Implementation of Bit-parallel Lattice Wave Digital Filters with Increased Maximal Sample Rate

In this paper arithmetic transformations for increased maximal sample rate of bit-parallel lattice wave digital filters implemented with carry-save arithmetic are proposed. The purpose is to increase the throughput in order to allow a reduction of the power consumption through supply voltage scaling. A lattice wave digital filter can be composed of firstand secondorder allpass sections which are recursive structures. This sets a bound on the maximal sample rate. The proposed transformations reduce the latency of the critical loop by reordering of arithmetic operations. The resulting structure is numerically equivalent to the original structure. Hence, the favourable properties of lattice wave digital filters, such as guaranteed stability, low coefficient sensitivity, and good dynamic range, are retained. An example of a filter implementation where the proposed transformations are applied is presented. The maximal sample rate for this example was improved by about 40% at the expense of a 10% increase of the chip area.